An Automatic Optimization Algorithm of SiC MOSFET Power Cycling Test parameters Based on the Device Thermal Networks

Konferenz: PCIM Asia 2024 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
28.08.2024-30.08.2024 in Shenzhen, China

doi:10.30420/566414028

Tagungsband: PCIM Asia 2024

Seiten: 7Sprache: EnglischTyp: PDF

Autoren:
Jin, Hao; Zhang, Jin; Zou, Xinyu; Yan, Yao

Inhalt:
Power cycling ( PC ) is one of the most important tests for power semiconductor reliability since it is particularly effective in verifying the reliability of chip bond-wire and chip solder layer. The target experimental parameters of PC test are junction temperature (Tj) fluctuation and the maximum Tj (Tj_max). Most of the current PC equipments operate by manual adjustment of test parameters in order to keep the experimental conditions as close as possible to the target values. In this paper, a novel computing method of SiC MOSFET power cycling test parameters was introduced. The proposed method extracted Foster model thermal network parameters based on the cooling curve of SiC MOSFET, and then calculated the most suitable heating time, heating power and cooling plate temperature for the devices under test (DUTs) based on the thermal network. Experimental results showed that the proposed method greatly improved the test efficiency and junction temperature measurement accuracy.