Parasitic Component and Gate Resistance Effects of Internal and External Package Level on Switching Performance of SiC Power Module

Inhalt:
This paper investigates critical influences of parasitic components and gate resistances at both the internal and external package levels on the switching behavior and efficiency of Silicon Carbide (SiC) power modules. Internal package-level parasitics, emanating from the package design and interconnections, as well as external package-level parasitics, arising from the interaction with external circuits, are examined in-depth. The study proposes a simulation model and leverages advanced simulation techniques to analyze these parasitic elements and gate resistancess. The results reveal their profound impact on switching characteristics and subsequent efficiency. This research provides valuable insights into the optimization of SiC power module design in the V(ds) = 1.2 kV class for enhanced performance and efficiency.