Model Design Development for False Turn-on Characterization in SiC-Based Active T-Type Converter Considering All Parasitics

Inhalt:
The dominant drawback of high-frequency high-voltage power converter is false turn-on of the OFF switches due to the existence of miller capacitor and high dv/dt. To ensure the secure converter operation, it is needed to investigate the comprehensive circuit model in case of false turn-on. This paper introduces a general circuitry method for investigating the gate-source induced voltage in SiC-MOSFET and Si-IGBT which are used in built T-type converter. This method is utilized to all possible scenarios to evaluate the effect of the parasitic parameters on the voltage amplitude across gate-source terminals of the switch during false turn-on. Simulation results and some standard experimental tests have been also carried out to verify the analytical methodology proposed in this paper.