Gate Oxide Reliability of Current Generation 1.2 kV SiC MOSFETs under Step-Wise Increased Gate Voltage
Konferenz: PCIM Europe 2024 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
11.06.2024-13.06.2024 in Nürnberg, Germany
doi:10.30420/566262088
Tagungsband: PCIM Europe 2024
Seiten: 8Sprache: EnglischTyp: PDF
Autoren:
Boldyrjew-Mast, Roman; Thiele, Sven; Basler, Thomas
Inhalt:
The gate oxide reliability of current generation SiC MOSFETs from five different manufacturers divided in seven groups has been analyzed in step-wise increased gate stress tests. All groups show a significantly varying intrinsic lifetime in terms of dielectric breakdown, dominantly resulting from the specific oxide thickness of each group. Low extrinsic failure rates have been found for each group indicating a well-defined screening procedure during the manufacturing process. During read-out interruptions, the threshold voltage has been measured with the hysteresis method in alignment with the JEDEC guideline JEP-184 at room temperature. Only two groups from one manufacturer showed a lifetime comparable to Si IGBTs.