Considerations for Mitigating False Triggering of a Truly Differential Input Gate Driver for 1.2kV SiC MOSFETs

Inhalt:
This work presents an experimental study on noise-induced false triggering events for a truly differential input (TDI) gate driver, with an emphasis on the gate driver power supply, PWM signal isolation, and PCB layout. Through a series of investigations and solutions, double pulse tests (DPT) were performed at a drain-to-source voltage of600 V and a load current of 25 A with no false turn-on events, achieving a maximum dv/dt of 80 V/ns. Prior to the proposed solutions, false triggering was observed at a dv/dt of 16 V/ns with less than 100 V and 5 A. The study demonstrates the importance of proper mitigation techniques to improve the reliability and performance of TDI gate drivers.