Characterization of the Static and Dynamic Behavior of a 1.2kV SiC JFET in Reverse Conduction

Inhalt:
To reduce conduction losses, SiC JFETs as alternative semiconductors to the state-of-the-art SiC MOSFETs are promising for automotive inverter applications. For those applications, reverse conduction of semiconductors is essential. The manufacturer does not typically describe the reverse conduction of normally-on JFETs without cascode, that is why this publication deals with it for a normally-on 1.2 kV SiC JFET. It is shown that a large gate-drain capacitance is responsible for a transient pull-down of the gate-source voltage at the passive switch during the turn-off of the active switch. Due to the changed gate-source voltage, the reverse conduction characteristic changes. This leads to a significant turn-on voltage undershoot at the passive switch. As a result, a higher turn-off drain-source voltage peak at the active switch occurs. Due to the higher peak voltage of the active switch, the switching must be slowed down. This paper shows the relationship of this effect in transient slopes and their relevance to the design of the gate resistance. Furthermore, a solution to prevent a large gate-source pull-down is shown. In addition, the static characteristics are compared to a state-of-the-art 1.2 kV SiC MOSFET.