Threshold Voltage Hysteresis in Compact Models of SiC MOSFETs

Inhalt:
Recent research has shown that the threshold voltage hysteresis effect in SiC-based power devices, originating from trapped charges at the gate oxide/SiC interface, has a great impact on the switching performance of SiC MOSFETs. This paper demonstrates the gate source threshold voltage hysteresis effect of SiC MOSFETs in simulated environments using compact models. Direct comparisons between simulation and measurement were carried out to verify the reproduction of this effect in simulation. The influence of turn-off gate voltage, based on simulation results, on the threshold voltage, gate charge, and turn-on performance has been presented and can be well established using compact models.