A Capacitive-Coupled Chopper Instrumental Amplifier Designed for Brain-Machine-Interface Circuits
Konferenz: EMIE 2022 - The 2nd International Conference on Electronic Materials and Information Engineering
15.04.2022 - 17.04.2022 in Hangzhou, China
Tagungsband: EMIE 2022
Seiten: 4Sprache: EnglischTyp: PDF
Autoren:
Li, Liwei; Duan, Quanzhen; Huang, Shengming (School of Integrated Circuit Science and Engineering, Tianjin University of Technology, and Tianjin Key Laboratory of Film Electronic and Communication Device, Tianjin, China)
Inhalt:
This paper proposed a low-noise and low-power-consumption capacitive-coupled chopper instrumental amplifier for brain-machine-interface (BMI) circuits. Based on the dc servo loop (DSL) of an active Gm-C integrator architecture, the dc offset voltage of the electrode can be suppressed. To enhance linearity and reduce noise, an very-low-transconductance (VLT) operational transconductance amplifier (OTA) with complementary input structure is introduced into the active Gm-C integrator in the dc servo loop. This article is completed in SMIC 0.18-µm CMOS process, and the total power consumption is only 5.94uW under the condition of 3.3V supply voltage. Besides, the high-pass corner frequency can be precisely set and linearly adjusted from 0.65 to 15Hz by the bias current of the VLT OTA.