The Design of Pixel-level ADC for CMOS Image Sensor Resistant to TID Irradiation
Konferenz: EEI 2022 - 4th International Conference on Electronic Engineering and Informatics
24.06.2022 - 26.06.2022 in Guiyang, China
Tagungsband: EEI 2022
Seiten: 7Sprache: EnglischTyp: PDF
Autoren:
Li, Mengyao; Long, Shanli; Wu, Chuanqi; Zhang, Ziqian (The East China Institute of Photo-Electronic Integrated Device, Suzhou, China)
Inhalt:
In CMOS image sensor, a pixel level ADC which can resist 5kGy TID irradiation is designed by using a novel S-gate-assisted (SGA) SOI device. The pixel level ADC is an MCBS ADC, which is applied to 4T-BPD pixel units. One ADC is multiplexed for every four pixel units, and only the core circuit module is integrated in the pixel unit, which makes the FF very high, and can easily realize quantization, variable step size and eliminate image lag. The circuit adopts 0.18micrometer CMOS process and 3.3V power supply voltage. The sampling signal frequency is 200kHz, and the input signal frequency is 3.90625kHz. The simulation results show that the dynamic parameter index values are: ENOB = 7.91bits, SNDR = 48.22dB, SFDR = 65.99dBc, SNR = 53.58dB, THD = -56.25dB, and the static parameter index values are: DNL = + 0.41/-0.52 LSB, INL = + 0.87/-1.06 LSB. The power consumption of a single pixel module (4 pixels plus comparator and latch pair) is 4.54muW, FOM ≈ 83.19fJ/conv, and can completely resist the TID effect of 5kGy dose. It has a good application prospect for CMOS image sensors exposed to high-dose irradiation environment.