iJTAG Layout Design Based on Improved Simulated Annealing Algorithm
Konferenz: MEMAT 2022 - 2nd International Conference on Mechanical Engineering, Intelligent Manufacturing and Automation Technology
07.01.2022 - 09.01.2022 in Guilin, China
Tagungsband: MEMAT 2022
Seiten: 4Sprache: EnglischTyp: PDF
Autoren:
Zeng, Ke; Xu, YiZhen (School of Electronic Engineering and Automation, Guilin University of Electronic Technology, Guilin, Guangxi, China)
Chen, Shouhong; Ma, Jun; Xu, Cuifeng (School of Electronic Engineering and Automation, Guilin University of Electronic Technology, Guilin, Guangxi, China & Guangxi Key Laboratory of Automatic Testing Technology and Instruments (Guilin University of Electronic Technology), Guilin, Guangxi, China)
Inhalt:
IEEE1687 (iJTAG) module layout was drawn manually to study and analyze inner Reconfigurable Scan Network (RSN) in the past. To address the problem of low efficiency and low error tolerance of manual layout, a method of iJTAG module layout is proposed in this paper. Based on the traditional Simulated Annealing Algorithm (SA), this method adaptively improves the cooling strategy and constructs a constraint function considering the interconnection between SIB and TDR units to achieve the optimal layout finally. The experimental results show that the proposed algorithm increases the convergence rate.