Challenges in Scaled High-Current SiC Measurements

Inhalt:
Scaled high-power measurements are the easiest way to evaluate the switching behavior of new semiconductors. Only one chip instead of a complete module is needed if the parasitic inductance is scaled. This scaled parasitic inductance can be placed everywhere in the commutation loop, but it also affects the switching behavior depending on the position, which is not expected. Within this paper, several mistakes in the test bench setup, e.g. the load inductor connection, are shown, and countermeasures are described. With an optimized test setup, a good match between high- and low-side measurement can be achieved.