Logic Self Repair Based on Regular Building Blocks

Inhalt:
The scalability of CMOS technology is apparently approaching physical limits. In particular, technology forecasts expect higher rates of permanent and transient faults, which make fault tolerant design and, eventually, built-in self repair (BISR) capabilities a necessity. While BISR works reasonably in regular structures such as memory blocks, BISR for random logic is by far an unsolved problem. This paper introduces a novel systematic approach towards logic BISR and gives some indications for cost and limitations.