A 10.3125-Gbit/s SiGe BiCMOS Burst-Mode Clock and Data Recovery Circuit with 160-bit Consecutive Identical Digit Tolerance
Konferenz: ECOC 2007 - 33rd European Conference and Exhibition of Optical Communication
16.09.2007- 20.09.2007 in Berlin, Germany
Tagungsband: ECOC 2007
Seiten: 2Sprache: EnglischTyp: PDF
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Autoren:
Terada, Jun; Nishimura, Kazuyoshi; Togashi, Minoru; Kawamura, Tomoaki; Ohtomo, Yusuke (NTT Microsystem Integration Laboratories, NTT Corporation, 3-1 Morinosato-Wakamiya Atsugi, Kanagawa, 243-0198, Japan)
Kimura, Shunji (NTT Access Network Service Systems Laboratories, NTT Corporation)
Inhalt:
A burst-mode clock and data recovery (CDR) circuit for 10 G-EPON OLT receivers is presented. The CDR employs a single-VCO architecutre, which increases consecutive identical digit (CID) tolerance. The developed CDR demonstrates 160-bit CID tolerance.