Ensuring optimal switching of power MOSFETs by compensating Vth variations using an integrated active gate driver
Konferenz: CIPS 2024 - 13th International Conference on Integrated Power Electronics Systems
12.03.2024-14.03.2024 in Düsseldorf, Germany
Tagungsband: ETG-Fb. 173: CIPS 2024
Seiten: 6Sprache: EnglischTyp: PDF
Autoren:
Feng, Zhengyang; Onizuka, Kohei (Bristol Research & Innovation Laboratory, Toshiba Europe Ltd., Bristol, UK)
Kumar, Manish (Bristol Research & Innovation Laboratory, Toshiba Europe Ltd., Bristol, UK & Cardiff University, Cardiff, UK)
Wang, Sheng (Cardiff University, Cardiff, UK)
Kawai, Shusuke; Ueno, Takeshi; Ishihara, Hiroaki (Corporate Research & Development Centre, Toshiba Corporation, Kawasaki, Japan)
Inhalt:
This paper presents a fully integrated digital active gate driver enhanced with a variation compensation algorithm to optimise MOSFET’s switching performance considering varying threshold voltage (Vth). We analyse the principle of Vth variations during MOSFET turn-on, which informs the configuration of the compensation algorithm. This algorithm adjusts the driving patterns stored in a lookup table. The results are demonstrated in SPICE simulation and double pulse testing when using a 650V Si super-junction MOSFET switched at 400V and 10A. The tuned driving patterns effectively compensate MOSFET Vth variations as 45.6 %-reduction in drain current overshoot is ensured under a 33 %-variation of Vth.