Interest of high frequency decoupling inductors for reducing common mode current in high speed switching cells

Konferenz: CIPS 2024 - 13th International Conference on Integrated Power Electronics Systems
12.03.2024-14.03.2024 in Düsseldorf, Germany

Tagungsband: ETG-Fb. 173: CIPS 2024

Seiten: 8Sprache: EnglischTyp: PDF

Autoren:
Botter, N. (Univ. Lille, Arts et Metiers Institute of Technology, Lille, France)
Bikinga, W. F.; Avenas, Y.; Guichon, J. M.; Schanen, J. L. (Univ. Grenoble Alpes, Grenoble, France)

Inhalt:
The increase of switching speeds in power converters thanks to wideband gap components has the positive aspect of reducing switching losses, but makes compliance with electromagnetic compatibility standards more complex. In this article, a method to reduce common mode currents is evaluated. This method is based on the use of a decoupling inductor set at the output of switching cell. The idea is to place a current source at the output of the cell, as it can be the case with the voltage and decoupling capacitors at the input. The first design rules of such inductor are presented, with a parallel made with decoupling capacitors. This is followed by a characterisation of the parasitic capacitances of a converter in order to carry out an electric simulation and design the decoupling inductor. Finally, experiments and simulations show a reduction of common-mode currents at high frequencies (>6MHz) with an off-the-shelf decoupling inductor. This paper therefore presents a proof of concept for the implementation of a decoupling inductor.