High Bandwidth and Ultra Low-Latency Near IR Communication Network for CMOS-compatible Integrated Photonics Chips

Inhalt:
Photonic Integrated Circuit (PIC) have outperformed its electrical counterpart in terms of on-chip processing and power consumption by transmitting and computing optical signals at ultra-high speed, using less energy. However, fully functional optical transceivers are still rare. This work introduces the design and implementation of a tunable transceiver and an optical communication network on top of an external laser source, functioning in the near-Infrared (IR) range. The transceiver is composed of the integrated circuit of an optical chip, a hardware acceleration interface, and a customized Digital-to-Analog Converter (DAC) at the transmitter and receiver side. The photonic chip was designed and fabricated on CMOS compatible and represents an integrated Optical Phased Array (OPA), which modulates light for multi-channel beam control. The two-dimensional beam steering relies on an array of waveguide grating couplers, which ensures high accuracy and directionality during the narrow beam radiation. In the longitudinal direction, the beam is steered by a wavelength tuning mechanism, while for the lateral direction, the lobe is controlled by a network of thermo-optical phase shifters. The hardware accelerator, a Multiprocessor System-on-Chip (MPSoC), computes the source data with random coefficient in Galois Fields (GF) to generate coded packets, which flow throughout the optical beams. Additionally, the accelerator is also responsible for the selection of the input voltage within the DACs to control the optical chip. To ensure successful packet transmission when the transmitter and receiver are in motion, a dynamic sliding window protocol based on Random Linear Network Coding (RLNC) was designed and implemented at the MAC layer. Extensive simulation demonstrates that our implementation results in an average packet success rate of 93.58% with reduction in average delay.