Operation-Level Synthesis

Inhalt:
We propose Operation-Level Synthesis (OLS) – a novel approach to generate a synthesizable hardware design from an abstract software model. Our goal is to contribute to conventional High-Level Synthesis (HLS) flows by making them suitable for control-oriented and compositional designs. The proposed approach can be used to establish an agile hardware design process for complex digital systems. Additionally, formal properties are automatically generated along the design to ensure a sound relationship between the abstract model and the design. These properties are also used as an documentation of the design and allow the designer to verify manual changes. We demonstrate our approach by conducting multiple experiments, comparing the generated hardware to handwritten designs in terms of correct functionality, area and performance.