IEC 63011-1:2018
Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology
Ausgabedatum:
2018-11
Edition:
1.0
Sprache: EN-FR - zweisprachig englisch/französisch
Seitenzahl: 24 VDE-Artnr.: 226107
IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.