IEC 60191-6-20:2010
Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)
Ausgabedatum:
2010-08
Edition:
1.0
Sprache: EN-FR - zweisprachig englisch/französisch
Seitenzahl: 21 VDE-Artnr.: 217498
IEC 60191-6-20:2010 specifies methods to measure package dimensions of small outline J-lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.