Rubrik: Proceedings - Allgemeine Proceedings
SMACD / PRIME 2021
größer

VDE ITG (Hrsg.)

SMACD / PRIME 2021

International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design and

2021, 423 Seiten, 140 x 124 mm, Slimlinebox, CD-Rom
ISBN 978-3-8007-5588-2, E-Book: ISBN 978-3-8007-5589-9
Persönliche VDE-Mitglieder erhalten auf diesen Titel 10% Rabatt

Inhaltsverzeichnis Vorwort

SMACD 2021 – International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design.

The 2021 edition of the International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) was originally planned in Erfurt, Germany, but will be held virtually, as a forum devoted to modeling, simulation and synthesis for Analog, Mixed-signal, RF (AMS/RF) and multi-domain (nanoelectronics, biological, MEMS, optoelectronics, etc.) integrated circuits and systems.
Experiences with modeling, simulation and synthesis techniques including machine-learning and artificial intelligence in diverse application areas are also welcomed. Objective technologies include CMOS, beyond CMOS, and, Morethan-Moore such as MEMS, power devices, sensors, passives, etc. SMACD 2021 is Technically Co-sponsored by IEEE, IEEE CEDA and IEEE CAS. The conference proceedings will be submitted for inclusion in IEEExplore.

PRIME 2021 – 16th Conference on PhD Research in Microelectronics and Electronics
PRIME has been established over the recent years as an important conference where PhD students and postdocs with less than one year post-PhD experience can present their research results and network with experts from industry, academia and research. PRIME 2021 will feature conference program reflecting the wide spectrum of research topics in Microelectronics and Electronics, building bridges between various research fields. In addition to the technical sessions, opportunities for the conference attendees will be the keynote talks, workshops, social events and conference proceedings will be submitted for IEEE Xplorer.
VDE ITG – Informationstechnische Gesellschaft im VDE
Die VDE ITG ist als interdisziplinär arbeitende, wissenschaftliche Fachgesellschaft in das fachübergreifende Netzwerk des VDE eingebunden. Sie agiert als Schnittstelle für Experten der Informationstechnik (ITK) in Wirtschaft, Verwaltung, Lehre und Forschung. Ihre Mitglieder bündeln in enger internationaler Anbindung die deutsche Kompetenz im Bereich der ITK. Die VDE ITG fördert Forschung und Anwendung dieser Schlüsseltechnologie sowie deren effizienten Einsatz in den Bereichen Daten- und Kommunikationstechnik und -systeme, Umweltschutz, Medizin und Verkehr.
Zur erweiterten Tagungsbeitragssuche
1

Qubit Gate Quality Loss Through Circuit Parasitics and Noise

Autoren: Geck, Lotte; van Waasen, Stefan
2

Modeling Power Supply Noise in RF SoCs

Autoren: Meier, Jonas; Menke, Florian; Wang, Lantao; Lauber, Tim; Wunderlich, Ralf; Heinen, Stefan
3

High-Performance Flexible and Printed Electronics Based on Inorganic Semiconducting Structures

Autoren: Dahiya, Abhishek Singh; Shakthivel, Dhayalan; Kumaresan, Yogeenth; Dahiya, Ravinder
4

Optimizing Neural Networks for Embedded Hardware

Autoren: Helms, Domenik; Amende, Karl; Bukhari, Saqib; de Graaff, Thies; Frickenstein, Alexander; Hafner, Frank; Hirscher, Tobias; Mantowsky, Sven; Schneider, Georg; Vemparala, Manoj-Rohit
5

The Essential Role of Procedural Approaches in Electronic Design Automation

Autoren: Marolt, Daniel; Scheible, Juergen; Jerke, Goeran; Marolt, Vinko
6

Trash or Treasure? Machine-learning based PCB layout anomaly detection with AnoPCB

Autoren: Franke, Henning; Kucera, Paul; Kuners, Julian; Reinhold, Tom; Grabmann, Martin; Maeder, Patrick; Seeland, Marco; Glaeser, Georg
7

A Deep Learning Toolbox for Analog Integrated Circuit Placement

Autoren: Gusmao, Antonio; Canelas, Antonio; Horta, Nuno; Lourenco, Nuno; Martins, Ricardo
8

A Differential Evolution based Methodology for Parameter Extraction of Behavioral Models of Electronic Components

Autoren: Alia, Gazmend; Buzo, Andi; Ludwig, Daniel; Maurer, Linus; Pelz, Georg
9

Machine Learning in the Analog Circuit Simulation Loop

Autoren: Tzenov, Petar; Sokar, Ahmed
10

Bringing Structure into Analog IC Placement with Relational Graph Convolutional Networks

Autoren: Gusmao, Antonio; Horta, Nuno; Lourenco, Nuno; Martins, Ricardo
11

Machine Learning in Charge: Automated Behavioral Modeling of Charge Pump Circuits

Autoren: Grabmann, Martin; Landrock, Christian; Glaeser, Georg
12

Frequency-Limited Reduction of RLCK Circuits via Second-Order Balanced Truncation

Autoren: Axelou, Olympia; Garyfallou, Dimitrios; Floros, George
13

A Mixed Time-Frequency RF Simulation Technique Based on Numerical Time-Slot Partitioning

Autoren: Oliveira, Jorge F.
14

Application of Asymmetric Crosstalk Harnessed Signaling on 3D Hexagonal Interconnect Arrays

Autoren: Iparraguirre, Daniel; Delgado-Frias, Jose
15

Adaptive Test Bench Generation, Simulation and Parameter Extraction for AMS Circuitry

Autoren: Meyer, Alexander; Weihs, Leon; Wunderlich, Ralf; Heinen, Stefan
16

Monitoring Analog Circuit Performance using Adaptive Filters and RSM-based Behavioral Models

Autoren: Taddiken, Maike; Paul, Steffen; Peters-Drolshagen, Dagmar
17

A Compact Model for Scalable MTJ Simulation

Autoren: Garcia-Redondo, Fernando; Prabhat, Pranay; Bhargava, Mudit; Dray, Cyrille
18

A Quantitive Analysis of the Recovery Effect in Batteries from Datasheets

Autoren: Bocca, Alberto; Chen, Yukai; Wang, Wenlong; Macii, Alberto; Macii, Enrico; Poncino, Massimo
19

A Phase Error Correction Algorithm for RF Energy Harvesters Using Two Antennas

Autoren: Guengoerdue, Ali Dogus; Erol, Didem; Caglar, Alican; Yelten, Mustafa Berke
20

Robust Design Methodology for RF LNA including Corner Analysis

Autoren: Martinez-Perez, Antonio D.; Aznar, Francisco; Royo, Guillermo; Martinez-Martinez, Pedro A.; Celma, Santiago
21

Event-Driven Modeling and Simulation of 5G NR-Band RF Transceiver in SystemVerilog

Autoren: Park, Chan Young; Kim, Jaeha
22

Sensitivity analysis in dynamic WPT systems based on non-intrusive stochastic methods

Autoren: Lagouanelle, Paul; Di Capua, Giulia; Femia, Nicola; Freschi, Fabio; Maffucci, Antonio; Pichon, Lionel; Ventre, Salvatore
23

Performance Analysis of IPT Systems for Electric Vehicles Dynamic Battery Charging

Autoren: Di Capua, Guilia; De Guglielmo, Luca; Femia, Nicola
24

Coil Geometry Modeling and Optimization for a Bidirectional Wireless Power Transfer System

Autoren: Nigsch, Simon; Kyburz, Falk; Schenk, Kurt
25

Impact of the Pad Geometry on System-Level Performance Indicators for IPT Systems in Electrical Vehicles

Autoren: Maffucci, Antonio; Ventre, Salvatore; Delgado Exposito, Alberto
26

A Probe Placement Method for Efficient Electromagnetic Attacks

Autoren: Jiang, Minmin; Pavlidis, Vasilis F.
27

Dealing with hierarchical partitioning in bottom-up design methodologies

Autoren: Passos, F.; Saraza-Canflanca, Pablo; Castro-Lopez, Rafael; Roca, Elisenda; Fernandez, Francisco V.
28

Modeling and Optimization of Supply Sensitivity for a Time-Domain Temperature Sensor

Autoren: Tan, Jun
29

Noise Performance in Current Mirror Circuit based on CNTFET and MOSFET

Autoren: Marani, Roberto; Perri, Anna Gina
30

A gm/ID Sizing Method for High-speed Multi-stage Operational Amplifiers with Feedforward-only Compensation

Autoren: Xie, Qixu; Shi, Guoyong; Ye, Yaoyao
31

Hybrid Capacitor-less LDO with Switched-Mode Dead-Zone Control

Autoren: Laleni, Nellie; Tsiougkos, Andreas; Pavlidis, Vasilis
32

Verilog-A model development of a DC–DC boost controller with autonomous optimization

Autoren: Severin, Davide; Capodivacca, Giovanni; Tchodjie Tchamabe, Bernard Blaise; Buzo, Andi; Diaconu, Cristian-Vasile
33

Analog Circuit Abstraction to SystemC-AMS Secured by Affine Forms

Autoren: Tarraf, Ahmad; Hedrich, Lars
34

Simulating the impact of Random Telegraph Noise on integrated circuits

Autoren: Saraza-Canflanca, Pablo; Camacho-Ruiz, Eros; Castro-Lopez, Rafael; Roca, Elisenda; Martin-Martinez, Javier; Rodriguez, Rosana; Nafria, Montserrat; Fernandez, Francisco V.
35

Connecting Energy Storages from Tool Independent, Signal-flow Oriented FMUs

Autoren: Ehlert, Meik; Michael, Jan; Henke, Christian; Traechtler, Ansgar; Kalla, Matthias; Bagaber, Bakr; Ponick, Bernd; Mertens, Axel
36

Adaptive Simulation with HDL Control Module for Frequency Converting Circuits

Autoren: Tibenszky, Zoltan; Kreissig, Martin; Carta, Corrado; Ellinger, Frank
37

Step Size Determination Approach for Aging Simulations in Analog ICs

Autoren: Afacan, Engin
38

Schematic Generation of Programmable Analog Neural Networks for Signal Proccessing

Autoren: Aul, Florian; Katsaouni, Nikoletta; Krischker, Lukas; Schmalhofer, Sascha; Schulz, Marcel H.; Hedrich, Lars
39

Generators, Templates, and Code Generation for Flexible Automation of Array-Style Layouts

Autoren: Prautsch, Benjamin; Wittmannm, Reimund; Eichler, Uwe; Hatnik, Uwe; Lienig, Jens
40

Improvement of Simulation-Based Analog Circuit Sizing using Design-Space Transformation

Autoren: Schweikardt, Matthias; Scheible, Juergen
41

Machine Learning Based Procedural Circuit Sizing and DC Operating Point Prediction

Autoren: Uhlmann, Yannick; Essich, Michael; Schweikardt, Matthias; Scheible, Juergen; Curio, Cristobal
42

Surrogate-Assisted Multi-objective Differential Evolution based on Gaussian Process for Analog Circuit Synthesis

Autoren: Yin, Sen; Hu, Wenfei; Wang, Ruitao; Wang, Zhikai; Zhang, Jian; Wang, Yan
43

A fast Structural Synthesis Algorithm for Op-Amps based on Multi-Threading Strategies

Autoren: Abel, Inga; Kowalsky, Clara; Graeb, Helmut
44

An Essay on the Next Generation of Performance-driven Analog/RF IC EDA Tools: The Role of Simulation-based Layout Optimization

Autoren: Martins, Ricardo; Gusmao, Antonio; Canelas, Antonio; Passos, Fabio; Lourenco, Nuno; Horta, Nuno
45

An Efficient Modeling Approach for Large Ring Oscillator Based Ising Machines

Autoren: Graber, Markus; Angeli, Nico; Hofmann, Klaus
46

The Merging Technique to Simulate Synchronization Mode of Coupled Oscillators

Autoren: Gourary, Mark M.; Rusakov, Sergey G.
47

RTL Implementation of MCMC-based Constraints Solver

Autoren: Ahmed, Moemen; Ahmed, Youssef; Nagy, Younan; Adbel-Rahman, Manar; Salah, Khaled; El-Kharashi, M. Watheq; Khan, Ayub
48

A study of SRAM PUFs reliability using the Static Noise Margin

Autoren: Camacho-Ruiz, Eros; Saraza-Canflanca, Pablo; Castro-Lopez, Rafael; Roca, Elisenda; Brox, Piedad; Fernandez, Francisco V.
49

Design and Optimization of a Control Algorithm for a Digital Low-Dropout Regulator in System-on-Chip Applications

Autoren: Ohse, Benedikt; Tan, Jun
50

A Differential Public PUF Design for Lightweight Authentication

Autoren: Duan, Shengyu; Sai, Gaole
51

Organic Transistor Parameter Estimation and Accurate Modeling for Process Optimization

Autoren: Liguori, Rosalba; Licciardo, Gian Domenico; Di Benedetto, Luigi
52

Bias Temperature Instability Characterization and Modeling for 0.18um CMOS Under Extreme Thermal Stress Conditions

Autoren: Tran, Yen; Nomura, Toshihiro; Cherchali, Mohamed Salim; Tassin, Claire; Deval, Yann; Maneux, Cristell
53

Run-Time Adaptive Hardware Accelerator for Convolutional Neural Networks

Autoren: Sestito, Cristian; Spagnolo, Fanny; Corsonello, Pasquale; Perri, Stefania
54

Design and Analysis of a Leading One Detectorbased Approximate Multiplier on FPGA

Autoren: Scarfone, Salvatore; Frustaci, Fabio; Perri, Stefania
55

Extending a RISC-V core with an AES hardware accelerator to meet IOT constraints

Autoren: Zgheib, Anthony; Potin, Olivier; Rigaud, Jean-Baptiste; Dutertre, Jean-Max
56

Memristive Logic-in-Memory Implementations: A Comparison

Autoren: Inglese, Pietro; Vatajelu, Elena Ioana; Di Natale, Giorgio
57

A 12-bit 100 MHz SAR ADC in 110-nm CMOS for MAPSs

Autoren: Tedesco, Silvia
58

A Timing Skew Correction Technique in Time-Interleaved ADCs Based on a DeltaSigma Digital-to-Time Converter

Autoren: Be, Gabriele; Mercandelli, Mario; Bertulessi, Luca
59

A low-noise high-speed comparator for a 12-bit 200-MSps SAR ADC in a 28-nm CMOS process

Autoren: Ricci, Luca; Bertulessi, Luca; Bonfanti, Andrea
60

A 2GS/s 10-bit Time-Interleaved Capacitive DAC for Self-Interference-Cancellation Application

Autoren: Abedinkhan Eslami, Mazyar; Manstretta, Danilo; Castello, Rinaldo
61

Implementation of a Low Power Decimation Filter in a 180 nm HV-CMOS Technology for a Neural Recording Front-End

Autoren: Sporer, Markus; Graber, Nicolas; Moll, Steffen; Reich, Stefan; Ortmanns, Maurits
62

Analog Baseband Filter and Variable-gain Amplifier for Automotive Radars in 22 nm FD-SOI CMOS

Autoren: Seidel, Andres; Li, Songhui; Szilagyi, Laszlo; Carta, Corrado; Wagner, Jens; Ellinger, Frank
63

A Highly Linear High-Voltage Compliant Current Output Stage for Arbitrary Waveform Generation

Autoren: Schwarze, Felix; Protze, Florian; Matthus, Christian; Ellinger, Frank
64

A RISC-V-based System on Chip for High-Speed Control in Safety-Critical 650 V GaN-Applications

Autoren: Richter, Mike; Luedecke, Andre; Lee, Yoon-Cue; Stanitzki, Alexander; Utz, Alexander; Grau, Guenter; Kappert, Holger; Kokozinski, Rainer
65

An Approach to Online Wear Out Monitoring of PCB Interconnects in Safety-Critical Systems

Autoren: Yazdani, Saeid; Wolz, Werner; Engelhardt, Rainer; Schott, Christian; Heinkel, Ulrich; Kriesten, Daniel
66

Experimental Investigation of Dielectric Loss Induced Noise in Charge Detection Systems for Cosmic Dust

Autoren: Kelz, Sebastian; Groezing, Markus; Berroth, Manfred
67

Generalized comparison of the accessible emission limits of flash- and scanning LiDAR-systems

Autoren: Burkard, Roman; Viga, Reinhard; Ruskowski, Jennifer; Grabmaier, Anton
68

A Mixed-Precision Binary Neural Network Architecture for Touch Modality Classification

Autoren: Younes, Hamoud; Ibrahim, Ali; Rizk, Mostafa; Valle, Maurizio
69

A CMOS SPAD pixel with an integrated mixed-signal TDC

Autoren: Moreno, Sergio; Moro, Victor; Dieguez, Angel
70

Germanium – InGaZnO heterostructured thinfilm phototransistor with high IR photoresponse

Autoren: Ferhati, Hichem; Djeffal, Faycal; Bendjerad, A.
71

Integrated Hysteretic Controlled Regulating Buck Converter with Capacitively Coupled Bootstrapping

Autoren: Galea, Francarl; Casha, Owen; Grech, Ivan; Gatt, Edward; Micallef, Joseph
72

Single-Inductor Dual-Output Buck Converter with Charge Recycling

Autoren: Ozanoglu, Kemal; Dundar, Gunhan
73

Design of an integrated Maximum Power Point Boost Converter for PV Submodules

Autoren: Weihs, Leon; Hanhart, Michael; Rolff, Leo; Wunderlich, Ralf; Heinen, Stefan
74

Design of a High PSRR Multistage LDO with On-Chip Output Capacitor

Autoren: Zoche, Jonas; Hanhart, Michael; Grobe, Jan; Weihs, Leon; Rolff, Leo; Wunderlich, Ralf; Heinen, Stefan
75

Skew and Jitter Performance in CMOS Clock Phase Splitter Circuits

Autoren: Scaletti, Lorenzo; Parisi, Angelo; Bertulessi, Luca
76

Entropy Analysis of RO-based Physically Unclonable Functions

Autoren: Diez-Senorans, Guillermo; Garcia-Bosque, Miguel; Sanchez-Azqueta, Carlos; Celma, Santiago
77

On the Behavior of a Wide Set of Oscillators: PUFs or TRNGs?

Autoren: Garcia-Bosque, Miguel; Naya, Abel; Diez-Senorans, Guillermo; Sanchez-Azqueta, Carlos; Celma, Santiago
78

A 55 MHz Integrated Crystal Oscillator with Chirp Injection Using a 28-nm Technology

Autoren: Wang, Lantao; Arnold, Adrian; Meier, Jonas; Scholl, Markus; Wunderlich, Ralf; Heinen, Stefan
79

A low-power 26.56-GHz LC-based DCO for multi-gigabit communication systems

Autoren: Jimenez-Fernandez, Pablo; Guerra, Oscar; del Rio, Rocio; Rodriguez-Perez, Alberto; Prefasi, Enrique
80

A Wide-Tuning-Range 55 GHz CMOS VCO on 22 nm FD-SOI Technology

Autoren: Tibenszky, Zoltan; Carta, Corrado; Ellinger, Frank
81

A Fully Integrated 28 GHz Class-J Doherty Power Amplifier in 130 nm BiCMOS

Autoren: Veni, Simone; Caruso, Michele; Seebacher, David; Neviani, Andrea; Bevilacqua, Andrea
82

A Scalable CPW Circuit Model in Advanced CMOS Technologies for mm-Wave frequencies

Autoren: Guizan, Carla Moran; Baumgartner, Peter; Heinen, Stefan
83

A Sub-1muA Low-PowerLow-NoiseAmplifier with Tunable Gain and Bandwidth for EMG and EOG Biopotential Signals

Autoren: Vieira, Rafael; Martins, Ricardo; Horta, Nuno; Lourenco, Nuno; Povoa, Ricardo
84

Transistor Downscaling toward Ultra-Low-Power, sub-100 mum2 and sub-Hz Oscillators

Autoren: Barbruni, Gian Luca; Bielli, Chiara; Demarchi, Danilo; Carrara, Sandro
85

Electronic solution to compensate the effects of the temperature and the humidity on the measurements of a capacitive sensor dedicated to an injection insulin pen

Autoren: Joly, Sylvain; Lepple-Wienhues, Albrecht; Dehollain, Catherine
86

A scalable spike detection method for implantable high-density multielectrode array

Autoren: Tambaro, Mattia; Vallicelli, Elia Arturo; Saggese, Gerardo; La Gala, Andrea; Maschietto, Marta; Leparulo, Allesandro; Strollo, Antonio; De Matteis, Marcello; Baschirotto, Andrea; Vassanelli, Stefano
87

Current-reuse Low-Power Single-Ended to Differential LNA for Medical Ultrasound Imaging

Autoren: Mirea, Olivia; Wulff, Carsten; Ytterdal, Trond
88

Low Power High Linearity 14-23 GHz SiGe HBT Downconversion Mixer

Autoren: Ahmed, Syed Sharfuddin; Schumacher, Herrmann
89

A Mixer-Embedded Low Noise Amplifier for Mixer-First Direct-Conversion Wake-Up Receivers

Autoren: Nardi, Christopher; Kronig, Alexander; Wunderlich, Ralf; Heinen, Stefan
90

Make Some Noise: Energy-Efficient 38 Gbit/s Wide-Range Fully-Configurable Linear Feedback Shift Register

Autoren: Wagner, Christoph W.; Glaeser, Georg; Sasse, Thomas; Kell, Gerald; Del Galdo, Giovanni
91

Every Clock Counts – 41 GHz Wide-Range Integer-N Clock Divider

Autoren: Wagner, Christoph W.; Glaeser, Georg; Kell, Gerald; Del Galdo, Giovanni
92

Modeling Ni/β-Ga2O3 SBD interface properties

Autoren: Labed, Madani; Sengouga, Nouredine; Meftah, Afak; Park, Jun Hui; Kyoung, Sinsu; Kim, Hojoong; Rim, You Seung
93

Performance assessment of a new low-cost RF sputtered Schottky diode based on a-Si/Ti structure

Autoren: Ferhati, Hichem; Djeffal, Faycal; Bendjerad, A.; Benhaya, A.
94

Digitally Programmable Potentiometer Multistage Architecture with Switch Independent Linearity

Autoren: Ilie, Giorgiana-Catalina; Tudoran, Cristian; Neagoe, Otilia; Pristavu, Gheorghe; Brezeanu, Gheorghe
95

Reliability Investigation of 0.18mum CMOS for Oilfield Applications

Autoren: Tran, Yen; Nomura, Toshihiro; Cherchali, Mohamed Salim; Tassin, Claire; Deval, Yann; Maneux, Cristell
96

A Cryogenic High-Voltage Amplifier for Ion Traps

Autoren: Sieberer, Michael; Sandner, Christoph; Hadley, Peter
97

Cryogenic RF Transimpedance Amplifier in 22 nm SOI-CMOS for Control of a Qubit

Autoren: Heinen, Ricardo; Nielinger, Dennis; Grewing, Christian; Wunderlich, Ralf; Heinen, Stefan
98

A First Order-Curvature Compensation 5ppm/degC Low-Voltage & High PSR 65nm-CMOS Bandgap Reference with one-point 4-bits Trimming Resistor

Autoren: Barteselli, Edoardo; Sant, Luca; Gaggl, Richard; Baschirotto, Andrea
99

Resource Efficient Sub-VT Level Shifter Circuit Design Using a Hybrid Topology in 28 nm

Autoren: Chatterjee, Saikat; Rueckert, Ulrich