Balancing Switching Transient of Paralleled SiC-MOSFETs by Using Adaptive Gate Current Shaping

Abstract:
In high power applications, SiC-MOSFETs are often connected in parallel to increase RMS current rating of the system. However, this normally leads to unbalanced current sharing, especially during switching transients, resulting in uneven system aging and long-term reliability issues. This study proposes a new gate drive methodology utilizing an advanced gate driver IC. The proposed gate drive method can adjust the gate drive strength individually to each gate loop of the paralleled SiC-MOSFETs based on their actual gate charge characteristics, resulting in a more balanced dynamic-stress distribution for the system.