Analysis of the effect of system parasitic parameters on the switching of SIC devices

Abstract:
This paper mainly analyzes the impact of system parasitic parameters on the usage of SiC devices, and investigates the mechanism of over-current during SiC MOS switch turn-on. The reasons for turn-on current oscillation are also analyzed in this paper. In addition to the impact of parasitic inductance on the voltage stress of power devices, this paper also emphasizes the negative impact of parasitic capacitance on turn-on current stress, current oscillation, and turn-on losses in system design.