Extending SiC MOSFET Short-Circuit Withstanding Time by Two-Level Turn-Off Gate Driving

Abstract:
Short-circuit withstanding time t(SC) requirements in industrial motor drive applications are often difficult to meet for commercially available silicon carbide (SiC) MOSFETs without compromising R(DS(ON))A performance. This paper proposes using a two-level turn-off (TLTO) mechanism to slow down the short-circuit energy rise in the SiC MOSFET, and thus extend its t(SC). The intrinsic tSC of SiC MOSFETs at different V (GS) and V(DS) is first characterized by destructive tests, as the basis for selecting key TLTO parameters. Using a digital gate driver IC for desaturation (DESAT) detection with TLTO, the extension of the short-circuit withstanding time to 10 mus and beyond is demonstrated under different short-circuit impedances.