Linearization of Drain-Source Capacitances for Antiserial Configurated SiC MOSFETs in High Frequency Solid State Switches

Abstract:
This paper introduces a simulation model for SiC MOSFETs with nonlinear output capacitance Cds to forecast capacitive current in antiserial topologies. In applications like ac-ac converters for solidstate transformers, hybrid 4-quadrant switches for ac power conversion, or ac switches for particle accelerator cavities, the necessity arises to block ac voltages up to several kV with frequencies up to 10,MHz. The paper presents a PLECS model where two identical SiC MOSFETs are arranged in an antiserial configuration. As SiC MOSFETs exhibit voltage-dependent behavior in their output capacitances Cds ∼ 1 : √v(ds) , this characteristic is incorporated into the model. Consequently, this unique configuration leads to a physical linearization of the drain-source capacitance.