Performance Evaluation of Deadtime and Gate Resistance for Parallel Connected GaN HEMTs

Abstract:
Gallium nitride (GaN) is gaining attention in the modern power electronics industry due to its superior performance. However, the lower current ratings of GaN devices serve as a bottleneck for scaling up power conversion system (PCS). While parallel connection of devices presents a straightforward approach to address this issue, comprehensive research in this area remains insufficient. This study aims to address several issues related to the parallel connection of GaN. Firstly, compared to Si devices, GaN has large losses due to high forward voltage during reverse conduction, so reasonable deadtime can reduce unnecessary losses. Secondly, it provides criteria for selecting resistance values from the perspective of driver ratings when using a single gate driver in the parallel structure of GaN. Finally, experiments were conducted to explore the efficiency limits achievable in the operation of three parallel units using the selected deadtime and gate resistance value. These research findings are expected to provide insights for researchers employing GaN-based PCS, particularly in setting limits for gate resistance selection and determining deadtime values when using GaN in parallel.