Improved Resonant Frequency-based Parasitic Inductance Estimation Method for SiC MOSFET Half-bridge Circuit

Abstract:
Estimating parasitic inductance by resonant frequency via double pulse tests is an easy-to-implement method. This method faces challenges in estimating the parasitic due to the short switching time of Wide-bandgap (WBG) semiconductor applications, causing measurement errors and poor resolution. This paper utilizes data processing methods such as Fast Fourier Transform, Continuous Wavelet Transform, and Variational Mode Decomposition to improve the accuracy and sensitivity of the conventional resonant frequency-based method. Besides, the finite element method (FEM) and experimental impedance measurement are carried out to validate the inductance estimation result. As a result, the proposed methods provide more accurate estimated parasitic inductance, reducing the estimation error by 40% to 90%.