Degradation Mode Analysis of Different Bonding Technologies of SiC Power Semiconductors Stressed by Active Power Cycling

Conference: PCIM Europe 2024 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
06/11/2024 - 06/13/2024 at Nürnberg, Germany

doi:10.30420/566262024

Proceedings: PCIM Europe 2024

Pages: 8Language: englishTyp: PDF

Authors:
Sankari, Rasched; Kessler, Ulrich; Rittner, Martin; Reinold, Manfred; Kaden, Thomas; Schwindt, Emilia; Schneider-Ramelow, Martin

Abstract:
SiC is being used as a new generation of power semiconductor to meet the increasing demands of modern electrified automotive powertrains. The standard AIT technology is Al-plated Si semiconductor wirebonded with Al wire bonding as the topside contact. With the establishment of highly reliable Ag-sinter die-attach technology, the Al bond wire has come into focus as the weakest component in the assembly. The typical and well-studied failure mode is a crack located near the interface between the Al bond wire and the Al metallization. A Cu-plated SiC with Cu bond wires is used to improve the robustness and reliability of the topside contact. This study compares the degradation mode of the Al-plated SiC with Al bond wire to a Cu-plated SiC with Cu bond wire in terms of degradation modes. The SiC MOSFETs investigated are plated with 4 µm Al or 30 µm Cu metallization and wirebonded on top with 300 µm Al or Cu bond wires. To evaluate the reliability of the devices, they are subjected to various stress configurations in active power cycling tests. Investigations of the Cu system showed that the Cu topside is more reliable than the Al topside contact and that the degree of oxidation affects the degradation mode of the Cu-AIT.