Suppression of Oscillations in a SiC Bridge-Leg using a Custom Single-Chip Digital Active Gate Driver with 2×255 Strength Levels

Abstract:
Digital active gate driving application-specific integrated circuits (ASICs), with a 100 ps waveform update resolution, have been demonstrated in GaN-based power converters to improve switching waveform quality. However, this high time resolution was achieved using fast, low-voltage core transistors, leaving too little output voltage swing to drive SiC power device gates. This paper introduces a new single-chip digital driver capable of driving a SiC gate with a voltage swing in excess of 36 V and a maximum update resolution of 1.2 ns. The ASIC contains internal memory for two gate sequences, and provides a choice of 255 current levels in both polarities. The paper demonstrates the use of high-bandwidth gate current measurement to program the driver to emulate available gate drivers, and to create new gate current profiles that are not currently available. This is demonstrated on a 1200 V SiC MOSFET with a 15 V gate voltage requirement. This device is switched in a bridge-leg with a DC voltage of 800 V and load current of 10 A. A gate current profile is demonstrated that reduces the power of high-frequency spectral components of current by 4.5 dB without affecting switching loss.