MapGL: Interactive Application Mapping and Profiling on a Grid of Processing Cells
Conference: DVCon Europe 2023 - Design and Verification Conference and Exhibition Europe
11/14/2023 - 11/15/2023 at Munich, Germany
Proceedings: DVCon Europe 2023
Pages: 7Language: englishTyp: PDF
Authors:
Raccomandato, Claudio (Politecnico di Torino, Turin, Italy)
Arasteh, Emad M.; Doemer, Rainer (CECS, University of California, Irvine, USA)
Abstract:
The Grid of Processing Cells (GPC) has been proposed as a scalable many-core architecture, modeled using SystemC TLM-2.0 methodology. This work introduces a graphical CAD software called Map Grid-based Layouts (MapGL) to facilitate the design process of GPC-based applications, automatically generate their SystemC models, and perform analyses on memory usage and speed. Using MapGL, we map a GoogLeNet Convolutional Neural Network (CNN) to a suitable GPC and improve it with a new modular Memory Access Resources and Interfaces (MARI) library for better communication between processing cells and lower resource usage.