A Novel Approach to Suppress Self-Excited Oscillations in SiC-Based Power Modules

Abstract:
High-frequency self-excited (SE) oscillations limit the performance of wide band gap (WBG) power modules. Design elements like drain inductance, source inductance, and internal gate resistance of a chip are state-of-the-art methods to mitigate these oscillations. In this paper, a novel approach using the inherent gate inductance between the chips as a design element to improve the stability of a power module with a common gate and common source configuration is presented. At high resonance frequencies in the hundreds of MHz range, the gate inductance between the chips acts as a high impedance path for SE oscillations and works in the same manner as an internal gate resistance of a chip. The quantitative, simulative, and measurement results presented in this paper validate the influence of gate inductance between the chips on SE oscillations.