Design And Implementation of Digital Signature Architecture Based on Chaos and SM2
Conference: ISCTT 2022 - 7th International Conference on Information Science, Computer Technology and Transportation
05/27/2022 - 05/29/2022 at Xishuangbanna, China
Proceedings: ISCTT 2022
Pages: 5Language: englishTyp: PDF
Authors:
Wang, Shuiqing; Liu, Qun; Yang, Ziheng (Electronic Engineering College, Heilongjiang University, Harbin, Heilongjiang, China)
Tong, Zhiyong (Heilongjiang Provincial Military Command, Harbin, Heilongjiang, China)
Abstract:
In order to avoid the key leakage caused by the attack and destroy the security of the password, this paper mainly proposes the design and implementation of an improved digital signature system based on SM2 algorithm. In the original digital signature system, the pseudo-random sequence generated by the chaotic system is introduced into the digital signature system as the key to realize a high-performance digital signature system, which is implemented on the ZYNQ platform according to the computational characteristics. SM2 algorithm has a large number of parallel operations, which is more suitable for PL hardware implementation. In order to reduce the utilization of hardware resources and realize highperformance hardware design, this paper selects and improves the fast computing algorithm to realize high-performance hardware architecture. The chaotic system selects the classical logistic map and generates a random sequence as the key after iterative quantization. Parallel operation is not involved in chaotic iteration, so it is transmitted from PS terminal to PL terminal through DMA. The working frequency of the digital signature architecture proposed in this paper is 100MHz, and each signature takes about 5.41ms.