A Low-power Low-noise Capacitive Readout Circuit for Accelerometers
Conference: EMIE 2022 - The 2nd International Conference on Electronic Materials and Information Engineering
04/15/2022 - 04/17/2022 at Hangzhou, China
Proceedings: EMIE 2022
Pages: 4Language: englishTyp: PDF
Authors:
Kong, Dameng; Duan, Quanzhen; Huang, Shengming (School of Integrated Circuit Science and Engineering, Tianjin University of Technology, and Tianjin Key Laboratory of Film Electronic and Communication Devices, Tianjin, China)
Abstract:
This paper presents an capacitive micro-electromechanical systems (MEMS) accelerometer readout circuit with ultralow- power (ULP). To achieve ultra-low-power characteristics, this circuit is based on self-balancing bridge (SBB) architecture that can reduce the noise requirement on amplifiers and do not require additional power consumption. Furthermore, the proposed circuit adopts a novel circuit scheme, namely, the feedforward noise reduction technique (FNRT), which removes some associated noise. Simulation results show that the designed readout circuit uses a fixed 1V supply and a common-mode voltage of 0.5V achieves 463 nW/√Hz noise levels and 152 nW power consumption.