An improved Carrier Tracking Loop Design under high dynamic and low CNR conditions
Conference: EEI 2022 - 4th International Conference on Electronic Engineering and Informatics
06/24/2022 - 06/26/2022 at Guiyang, China
Proceedings: EEI 2022
Pages: 5Language: englishTyp: PDF
Authors:
Xiao, Qi; Wang, Ju (Beijing Institute of Technology, Beijing, China)
Abstract:
The carrier tracking loop faces extreme difficulty in entering a locked-in state under high dynamic and low carrier-tonoise ratio (CNR) conditions, where the relative acceleration between satellite and receiver may exceed 100g (g=9.8m/s^2). To address this issue, this paper presents an improved carrier tracking loop which designs a highdynamic loop filter based on conventional second-order frequency-locked loop (FLL) serially assisted third-order phase-locked loop (PLL). The proposed loop filter adds two processing modules for acceleration and jerk in the secondorder FLL, which considers the effects of the tracking frequency errors generated by acceleration and jerk. The simulation results and comparative analysis demonstrate that the proposed FLL serially assisted PLL can achieve improved tracking performance under high dynamic and low CNR conditions.