Design and Implementation of Low-Latency and High-Throughput Parallel Sorter for Sphere Detector

Conference: CIBDA 2022 - 3rd International Conference on Computer Information and Big Data Applications
03/25/2022 - 03/27/2022 at Wuhan, China

Proceedings: CIBDA 2022

Pages: 4Language: englishTyp: PDF

Authors:
Hu, Cheng-Song; Xue, Lian (School of Artificial Intelligence, Wuhan Technology and Business University, Wuhan, China)

Abstract:
The MIMO-OFDM systems request high-throughput and low-latency sphere detector. In this paper, a parallel sorter with high-throughput and low-latency is presented for sphere detector, and it can arrange two ascending-sorted lists of numbers into one ascending-sorted list. The comparators of parallel sorter work in parallel and generate the results through the selection of unique route. Meanwhile the parallel sorter has a short critical path, and it can achieve high work frequency. The parallel sorter array can support the sort of more sequences through simply concatenation of parallel sorter. A parallel sorter array which can sort eight groups of eight dimension has been implemented by SMIC 0. 13 um CMOS process, and the max throughput is 360Mbps at work frequency of 360MHz, and the delay is three clocks.