Investigation on Blanking Time Effects Regarding Cross Currents in Time-Staggered Switching Mode

Abstract:
Reducing the dv/dt of fast switching semiconductors is often necessary to avoid over voltage effects due to cable reflections, which affect insulation and bearings. A low loss setup can be achieved utilising an interphase transformer with paralleled half-bridges in one phase leg. Naturally, this setup causes a cross current between the two half-bridges which can’t be completely eliminated. However, parasitic effects – like blanking time in particular – add additional components to this current, which can lead to saturation of the interphase transformer. The first step to eliminate these components is to understands their cause. This paper explains the effects and circumstances of blanking time related error voltages in the context of time-staggered switching. The effects are demonstrated by a simulation of a three phase converter system. Relevant components are identified and related to measurements.