Tailoring the Chip Area of SiC MOSFET Power Modules for Traction Applications

Abstract:
As a first approximation, the performance of SiC MOSFET modules varies linearly with the number of chips inside the module. This paper shows that several nonlinear dependencies must be considered for precise technology benchmarks and optimized designs. To cover these nonlinearities, an iterative workflow to adjust the chip area inside a power module to meet the application requirements of railway traction converters is presented. This approach makes it possible to compare different chip and package technologies on a level playing field from a technical point of view.