Hybrid PLL Structure for Improvement of the Dynamic Performance of Grid-Connected Converters

Abstract:
Within this paper, an improved PLL structure that combines both synchronous reference frame PLL (SRF-PLL) and decoupled double synchronous reference frame PLL (DDSRF-PLL) is presented. This hybrid DDSRF-PLL (HDDSRF-PLL) improves the positive sequence component tracking and leads to a better current response of the converter during transients compared to DDSRF-PLL. In the HDDSRF-PLL the positive sequence component is estimated by a SRF-PLL. The input signal of the SRF-PLL is reduced by the negative sequence component estimated by a DDSRF-PLL. Thus, the delays associated with sequence separation in positive sequence reference frame are avoided. The dynamic performance of the HDDSRF-PLL is validated with voltage drops caused by symmetrical and unsymmetrical short-circuits. The performance of the HDDSRF-PLL is compared with the performance of the DDSRF-PLL.