Commutation loop design for optimized switching behavior of CoolSiC(exp TM) MOSFETs using compact models

Abstract:
This paper discusses aspects of designing the commutation loop with a focus on optimizing the switching behavior of fast-switching CoolSiC(TM) MOSFETs by utilizing advanced SPICE compact models. The external circuitry, especially the stray inductance of the commutation loop has a considerable influence on the dynamic behavior of SiC MOSFETs. Ultra-fast switching typically requires a low-inductive commutation loop design; otherwise, the turn-off surge-voltage would reach values that are higher than the rated voltage of the device. However, depending on application requirements, lowest stray inductivity may not always be required for achieving good device performance. Compact models can help the circuit designer in understanding and optimizing the device behavior through circuit simulation. In this paper, switching measurements on two test setups with different stray inductances are presented and compared with results from circuit simulation, highlighting the opportunities of such models in the design process.