Gate Drive Strategies of SiC Cascodes
Conference: PCIM Europe 2016 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
05/10/2016 - 05/12/2016 at Nürnberg, Deutschland
Proceedings: PCIM Europe 2016
Pages: 7Language: englishTyp: PDF
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Authors:
Li, Xueqing; Zhang, Hao; Bhalla, Anup (United Silicon Carbide, Inc., USA)
Abstract:
The USCi SiC cascode is a composite power switch formed by series-connecting a high-voltage normally-on SiC JFET and a low-voltage Si MOSFET. The SiC cascode has more complex switching processes than a standalone MOSFET or JFET. The low voltage Si MOSFET may be driven into avalanche breakdown during turn-off process and the resonant tank formed by the parasitic inductances of the bond wires and capacitances of MOSFET and JFET may cause large oscillations. All of these issues must be carefully considered in the design to ensure reliable and stable operation of the SiC cascode. These issues can be mitigated or even eliminated by using proper gate drive approach. This work will discuss the impact of the different gate drive strategies on the SiC cascode switching performance.