Multi-Objective Aware Communication Optimization for Resource-Restricted Embedded Systems

Conference: ARCS 2015 - 28th International Conference on Architecture of Computing Systems
03/24/2015 - 03/27/2015 at Porto, Portugal

Proceedings: ARCS 2015

Pages: 8Language: englishTyp: PDF

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Authors:
Neugebauer, Olaf; Marwedel, Peter (TU Dortmund University, Dortmund, Germany)
Engel, Michael (Leeds Beckett University, Leeds, United Kingdom)

Abstract:
Creating efficient parallel software for current embedded multicore systems is a complex and error-prone task. While automatic parallelization tools help to exploit the performance of multicores, most of these systems waste optimization opportunities since they neglect to consider hardware details such as communication performance and memory hierarchies. In addition, most tools do not allow multi-criterial optimization for objectives such as performance and energy. These approaches are especially relevant in the embedded domain. In this paper we present PICO, an approach that enables multi-objective optimization of embedded parallel programs. In combination with a state-of-the-art parallelization approach for sequential C code, PICO uses high-level models and simulators for performance and energy consumption optimization. As a result, PICO generates a set of Pareto-optimal solutions using a genetic algorithm-based optimization. These solutions allow an embedded system designer to choose a parallelization solution which exhibits a suitable trade-off between the required speedup and the resulting energy consumption according to a given system’s requirements. Using PICO, we were able to reduce energy consumption by about 35% compared to the sequential execution for a heterogeneous architecture. Further, runtime reductions by roughly 55% were achieved for a benchmark on a homogeneous platform.