Shared-memory communication in distributed SoCs on multi-FPGA systems

Abstract:
In the field of high-precision measurement and control systems distributed multi-processor systems-on-chip on interconnected FPGA assemblies are a platform choice with the potential to achieve the required embedded real-time application performance. While there are multiple established on-chip system standards available, the off-chip communication is often subject to custom development. This paper introduces an interface component, which establishes a distributed shared memory with a unified global address space to abstract from an underlying physical bus topology. The shared memory implementation structure as part of a SoC design is introduced and the achievable performance on an experimental multi-FPGA platform is analysed.