Autonomic MPSoCs for Reliable Systems

Abstract:
Future MPSoCs have to cope with unreliable functionality of their nanometer-scale internal components, mainly due to increasing sensitivity for technology parameter variations and natural radiation. While error correction is widely known in memory design, protection for arithmetic logic units within CPUs is an issue for future research. For on-chip communication resources there are many error protection techniques available, but a tradeoff has to be found between techniques on various levels. In this paper we present our concept for Autonomic MPSoCs with capabilities for runtime detection and correction of sporadic errors, and adaptation of performance, power, and dependability on changing environmental conditions. Functional elements of the MPSoC are continuously monitored and controlled by autonomic elements. Re-distribution of tasks is supported by run-time performance analysis and an autonomic operating system. Life time dependability of the MPSoC is introduced in the design optimization process.