Investigation of thermo-mechanical fatigue in lateral GaN power transistors with variable switching and conduction losses

Abstract:
Modern GaN GIT transistors, optimized for lateral current flow have exhibited remarkable resilience to high power cy-cling loads without reaching a package related fatigue. To decrease the effective test time, novel test strategies with high acceleration factors are required. A DC power cycling test (PCT) with additional induced switching losses is one potential approach. This study demonstrates for the first time the feasibility of testing GaN HEMTs with an ohmic p-GaN gate in such an advanced test setup. All tested devices withstand several million power cycles and the high power cycling lifetime can be validated. However, the devices fail abrupt with an issue in their functionality and a damage in the semiconductor. The root cause could not be finally clarified in this work. In addition to the PCT, a thermal-electrical FEM simulation is performed to enhance the understanding of the thermal distribution in the package. An unexpected strong thermal gradient in the chip and quick cool-down after turning of the power pulse indicates an underestimation of the temperatures in the experimental PCT with even harsher testing conditions.