RISC-V based SoC with integrated switched-capacitor PUF in 180 nm

Abstract:
The RISC-V Instruction Set Architecture (ISA) as an open standard is a good alternative to proprietary RISC architectures with high license costs which can be problematic for smaller companies. Physical Unclonable Functions (PUF) are a promising way to build secure key storage for authentication and encryption purposes. The paper describes a reference System-on-a-Chip (SoC) design for use with a wide variety of different sensor applications as well as different wired or wireless communication interfaces and an integrated PUF, controlled by a RISC-V processor.