Analysis on Effectiveness of SRAM Test Algorithms and Test Statistics on Industrial Data

Abstract:
A comprehensive industrial study was performed during production to obtain information about the effectiveness of memory test algorithms. A high volume production of microcontrollers with embedded SRAMs was tested during Burn-In, and fault statistics within a statistical resolution of parts per million (ppm) could be compiled. Similarities and differences in the performance of algorithms are worked out by comparing fault coverage, union and intersection. Differences could be recognized in the fault coverage and effectiveness of traditional marching algorithms compared to newer test algorithms. Based on the large statistics, mapping of linked and dynamic fault models onto specific algorithms could be confirmed by the experimental analysis.